MF-DIG Digitizer

Combining the MFLI Lock-in Amplifier or the MFIA Impedance Analyzer with a digitizer opens up a wide range of measurement opportunities thanks to continuous streaming, cross-domain triggering, and a segmented memory. The 2 Scope channels can simultaneously display signals from the differential voltage input and from the current input. The integration afforded by LabOne® enables direct control through the web interface and straightforward programming with any of the LabOne APIs.

EUR 1,250.00
Get Quote

MF-DIG Key Features

  • Dual-trace oscilloscope with FFT, 16 bits, 60 MSa/s
  • 2.5 MSa memory/channel
  • 7 MHz input bandwidth
  • 30 MHz FFT span, 1 M points
  • High-definition mode HD24
  • Segmented and continuous digitizing
  • Hardware trigger engine with additional trigger inputs and outputs
  • LabOne user interface and API integration

MF-DIG Upgrade and Compatibility

  • Field-upgradeable option
  • Compatible with all other MF options

MF-DIG Functional Diagram

Low-noise digitizer for voltage and current signals

The MFLI Lock-in Amplifier and the MFIA Impedance Analyzer combine high-performance, low-noise input stages for voltage and current signals with common digitizer features such as shot and continuous operation. The input ranges can be adjusted to optimally match the input signals.

Thanks to the digitizer functions of the MF-DIG Digitizer option, input signals can be monitored and measured before demodulation and subsequently analyzed in the time and frequency domain. With this option, the LabOne Scope is transformed from a debugging tool into a fully featured digitizer. Two digitizing channels can measure two signals simultaneously.

The MF-DIG Digitizer option provides a current signal digitizer offered by no other vendor in the market today.

High-resolution sampling

For experiments that require sampling rates significantly below 60 MSa/s, the HD24 high-definition mode improves the physical 16-bit vertical resolution by averaging consecutive samples. Depending on the number of averaged samples, the nominal resolution can become as high as 24 bits.

Scope comparison

Feature MFLI, MFIA MFLI / MFIA + MF-DIG option
Scope channels 1 2
Scope sample rate 16-bit, 60 MSa/s 16-bit, 60 MSa/s
High-definition mode HD24 No, limited to 16 bits Yes, up to 24 bits nominal
Scope sample memory 16 kSa 2.5 MSa/channel
Dual-trace No Yes
Segmented memory No Yes, up to 1024 shots
Continuous acquisition No Yes
High-resolution FFT No Yes

 

MF-DIG Specifications

Digitizer operation modes
Shot/Triggered operation Yes, 60 MSa/s per channel
Continuous operation Yes, 117 kSa/s transfer to user interface
Dual signal acquisition Yes, simultaneous at 60 MSa/s
Input signals Voltage Input, Current Input, Aux Input 1-2, Ref/Trigger 1-2, Demodulators 1-4, Signal Output, Oscillators of Demodulators 1 and 4
Maximum number of shots Up to 1024
Sample transfer to computer
Shot/Triggered operation 3 MSa/s (USB, 1GbE)
Continuous operation to user interface 117 kSa/s (USB, 1GbE)
Continuous operation to API 3.75 MSa/s single channel (USB, 1GbE)
1.9 MSa/s two channels (USB, 1GbE)
Analog inputs
Input impedance 50 Ω and 10 MΩ
Input coupling AC/DC
Input ranges (voltage) ±1 mV to ±3 V in 8 steps
Input ranges (current) ±10 nA, ±10 µA, ±100 µA, ±10 mA
Input flatness (voltage) ±1 dB up to 2 MHz
SFDR 1,5 75 dB (3 V, 10 MΩ, 500 kHz, 0dB FS)
SNR 2,5 69 dB (3 V, 10 MΩ, 500 kHz, 0dB FS)
SINAD 3,5 68 dB (3 V, 10 MΩ, 500 kHz, 0dB FS)
ENOB 4,5 11.1 (3 V, 10 MΩ, 500 kHz, 0dB FS)
Triggers
Trigger modes Rising, falling, and gated trigger
Trigger sources Channel, external, oscillator, arithmetic, manual
Trigger signals Voltage Input, Current Input, Aux Input 1-2, Ref/Trigger 1-2, Demodulators 1-4, Signal Output, Oscillators of Demodulators 1 and 4
Trigger delay (pre-trigger) Adjustable to 100% of shot length
Trigger delay (post-trigger) Adjustable up to 10 s
Trigger configuration Level and hysteresis
Trigger output sources Scope armed, scope active, trigger active
Trigger outputs Ref/Trigger 1-2
Software trigger Scope trigger starts acquisition of demodulator samples
External triggers Ref/Trigger
Trigger impedance 1 kΩ
Trigger coupling DC
Trigger input full scale range (FS) ±5 V
Trigger output amplitude 5 V TTL
Recommended computer configuration
Processor Intel Core i3 or better, > 2.0 GHz
Memory (RAM) 4 GB
Storage SSD or HDD

 

1 Spurious free dynamic range in digitizer mode, no signal processing
2 Signal to noise ratio in digitizer mode, no signal processing
3 Signal to noise and distortion ratio in digitizer mode, no signal processing
4 Effective number of bits in digitizer mode, no signal processing
5 Typical value

 

call +41 44 515 04 10
or leave us a message.

To help with your request and to comply with data protection legislation we will need to confirm that you agree for us to collect and use your personal data:

See here for details of the data that we hold on our customers and what we do with it. If you have any questions please contact privacy@zhinst.com